1+ | 10+ | 100+ | 1000+ | 10000+ | Custom | |
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Uni Price | Get Quotation! | Get Quotation! | Get Quotation! | Get Quotation! | Get Quotation! | Get Quotation! |
Clock Frequency | 108MHz |
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Organization | 1232 CLBS, 24000 GATES |
Number of Logic Cells | 1232 |
Operating Temperature (Min) | -40°C |
Surface Mount | YES |
Terminal Finish | Tin/Lead (Sn/Pb) |
Number of CLBs | 1232 |
Height Seated (Max) | 4.572mm |
Terminal Position | QUAD |
Technology | CMOS |
JESD-30 Code | S-PQCC-J84 |
Terminal Form | J BEND |
Supply Voltage-Max (Vsup) | 3.6V |
Supply Voltage | 3.3V |
Operating Temperature (Max) | 85°C |
Number of Equivalent Gates | 24000 |
Width | 29.3116mm |
Qualification Status | Not Qualified |
RoHS Status | Non-RoHS Compliant |
Moisture Sensitivity Level (MSL) | 3 |
HTS Code | 8542.39.00.01 |
Supply Voltage-Min (Vsup) | 3V |
Additional Feature | ALSO OPERATES AT 5V SUPPLY |
JESD-609 Code | e0 |
Pin Count | 84 |
Time@Peak Reflow Temperature-Max (s) | 30 |
Peak Reflow Temperature (Cel) | 225 |
Number of Terminals | 84 |
Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY |
Length | 29.3116mm |
Terminal Pitch | 1.27mm |
Reach Compliance Code | compliant |
Temperature Grade | INDUSTRIAL |
Combinatorial Delay of a CLB-Max | 2.4 ns |
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